Address spaces are used to provide degrees of isolation between users. In one example, such as in the z/Architecture offered by International Business Machines Corporation, an address space is a consecutive sequence of integer numbers (i.e., virtual addresses) together with the specific transformation parameters that allow each number to be associated with a byte location in storage. The virtual addresses designate locations in virtual storage. Virtual storage gives the appearance of a larger main storage to the users of the environment.
When a virtual address is used by a central processing unit (CPU) to access main storage, it is first converted to a real address by, for instance, dynamic address translation (DAT), and then, to an absolute address by, for instance, prefixing. DAT may use from five to two levels of tables (e.g., region first table, region second table, region third table, segment table, and page table) as transformation parameters. The designation (origin and length) of the highest level table for a specific address space is called an address space control element, and it is found in a control register or is specified by an access register. Alternatively, the address space control element for an address space may be a real space designation, which indicates that DAT is to translate the virtual address simply by treating it as a real address and without using any tables.
DAT uses, at different times, the address space control elements in different control registers or specified by the access registers. The choice is determined by the translation mode specified in the current program status word (PSW). Four translation modes are available: primary space mode, secondary space mode, access register mode, and home space mode. Different address spaces are addressable depending on the translation mode.
DAT, prefixing, and other features associated with virtual storage and address spaces are described in z/Architecture: Principles of Operation, IBM® Publication No. SA22-7832-04, September 2005, which is hereby incorporated herein by reference in its entirety.
There are situations in which data is to be moved from one address space to another address space. Currently, in the z/Architecture, there is an instruction to move data from the primary address space to the secondary address space (MVCP), and another instruction to move data from the secondary address space to the primary address space (MVCS). For each type of move, a separate instruction is necessary, and the source and target address spaces are predefined by the individual instructions. Each instruction is used to move a maximum of 256 characters per execution from the source address space of the instruction to the target address space of the instruction. To move more than 256 characters, multiple instruction executions are required.
In addition to the above, data can be moved from one address space to another address space in the z/Architecture by using access registers. However, in order to perform the move using access registers, the structure for such a move, including operating system modifications, must be in place.